Slot resources and sampling rates
The FPGA resources are divided between slots and the supporting logic in the
platform surrounding the slots. The table below summarizes the resources
available to a custom design in each slot.
Moku:Delta (XCZU47DR)
| 3 Slots | 5 Slots | 8 Slots |
|---|
| Core Clock | 312.5MHz | 312.5MHz | 312.5MHz |
| LUT | 50000 | 40000 | 20000 |
| FF | 100000 | 80000 | 40000 |
| BRAM (36K) | 100 | 100 | 50 |
| DSP | 500 | 350 | 200 |
Moku:Pro (ZU9EG)
| 4 Slots |
|---|
| Core Clock | 312.5MHz |
| LUT | 48400 |
| FF | 96800 |
| BRAM (36K) | 154 |
| DSP | 432 |
Moku:Lab (ZC7020)
| 2 Slots | 3 Slots |
|---|
| Core Clock | 125MHz | 125MHz |
| LUT | 19600 | 12000 |
| FF | 39200 | 24000 |
| BRAM (36K) | 60 | 40 |
| DSP | 100 | 60 |
Moku:Go (ZC7020)
| 2 Slots | 3 Slots |
|---|
| Core Clock | 31.25MHz | 31.25MHz |
| LUT | 20000 | 12000 |
| FF | 40000 | 24000 |
| BRAM (36K) | 50 | 40 |
| DSP | 100 | 60 |
